The invention relates to a method of manufacturing a semiconductor device, wherein a semiconductor body is provided, at a surface, with an isolation region which is recessed in the semiconductor body, which isolation region defines a continuous active region in the semiconductor body wherein a transistor having, adjacent to the surface, emitter and collector regions of a first conductivity type and abase region of the opposite, second conductivity type are formed, said emitter, base and collector regions each being provided with a contact region, for which purpose a fist silicon layer is deposited on the surface, from which silicon layer two of said three contact regions are formed, which are mutually separated by an intermediate region wherein the first semiconductor layer is removed, which intermediate region extends transversely over the length of the active region, whereafter a second silicon layer is deposited, which is electrically insulated from the first silicon layer, and from which second silicon layer the third contact region is formed at the location of the intermediate region between the two contact regions mentioned first. Such a method is disclosed, inter alia, in the patent document U.S. Pat. No. 5,204,274.
The above-mentioned first and second semiconductor layer are formed, in specific embodiments, by layers of doped polycrystalline silicon (poly). A transistor having very small dimensions can be manufactured by combining the emitter, base and collector terminals in a two-layer poly process with a design wherein the whole transistor, including the collector terminal, is accommodated in a single active region. Such a transistor has important advantages in, inter alia, high-frequency applications and/or very low power applications. The transistor may be embodied so as to be a discrete device or it may form part of an integrated circuit.
In the above-mentioned patent document U.S. Pat. No. 5,204,274, various embodiments of this type of transistors, as well as various methods for the manufacture thereof, are described. In a specific embodiment, shown in FIG. 2H in U.S. Pat. No. 5,204,274, the active region in the silicon body is circumferentially surrounded with a pattern of silicon oxide recessed in the body. An emitter contact and a collector contact are formed from the first semiconductor layer (doped poly), the emitter contact extending over a part of the active region adjoining the left-hand edge, and the collector contact extending over a part of the active region that is situated on the right-hand side. The emitter contact and the collector contact are both n-type contacts. In the intermediate region between these contacts, the p-type base contact is provided in the second poly. The emitter in the transistor thus obtained adjoins the recessed silicon oxide on three sides at the circumference of the active region. Customarily, it is desirable to provide the emitter at some distance from the silicon oxide, inter alia, to preclude a short-circuit between the emitter and the collector along the edge of the active region.
It is an object of the invention to provide, inter alia, a double poly transistor in a single active region, such that the emitter is situated at some distance from the edge of the active region. This object is achieved by a method of the type described in the opening paragraph which is characterized, in accordance with the invention, in that of the two contact regions formed from the first semiconductor layer, a first contact region, which is connected to the collector region, is doped with an impurity of the first conductivity type, and the other, the second, contact region, which is connected to the base region, is doped with an impurity of the second conductivity type, the semiconductor body being doped, after the removal of the first semiconductor layer in the intermediate region, with an impurity of the second conductivity type at the location of said intermediate region to form a part of the base region which forms an intrinsic base region, after which the second semiconductor layer is deposited, from which the emitter contact and the emitter region of the first conductivity type are formed, and, in a stage after the first semiconductor layer has been removed at the location of the intermediate region and before the second semiconductor layer is deposited, strips of an electrically insulating material separating the emitter region from the isolation region are formed at two opposite sides of the active region at the location where the intermediate region between the base contact and the collector contact is adjacent to the isolation region. By using the first poly layer to form the base and collector terminals, and providing these terminals on either side of the active region, and by forming additional strips of electrically insulating material at the edge of the active region in the intermediate region where the emitter will be formed, it is possible to provide the emitter in the center of the active region at some distance from the edges of the active region. Since the base terminals and the collector terminals are oppositely doped, these terminals could in principle form a continuous poly layer, the terminals being separated by a pin-junction or a pin-junction in the poly. Preferably, however, the base and collector terminals are arranged so as to be completely separated, so that no poly pn(pin)-junction is formed between these terminals. As a result, the leakage between the base and the collector can be kept small.
Various embodiments of the method in accordance with the invention are described in the dependent claims, with each embodiment having its own advantages dependent on the specific conditions wherein it is employed.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter.